1. Field of the Invention
The present invention relates to a method of causing the selective formation of silicides upon silicon surfaces, and, more particularly, to a method of masking silicide deposition that utilizes a photoresist mask to block the implantation of silicide metal ions, restricting the formation of silicides to unmasked silicon surfaces.
2. Description of the Related Art
With the increased density of semiconductor devices, the sheet resistivity of the electrically-conducting structures of these devices, such as the gate, drain and source regions of MOS transistors, the emitters of bipolar transistors, the local interconnect regions of MOS and bipolar transistors, and the interconnect lines connecting these devices together, is beginning to limit the speed at which semiconductor devices can operate.
One well-known technique for reducing the sheet resistivity of silicon structures is to form a layer of metal silicide over the silicon structure. The resulting silicided structures provide the lower resistivity of a metal silicide along with the well-known attributes of silicon.
Formation of silicided structures is generally limited to semiconductor devices performing as digital circuits. Where linear circuits are present, introduction of metal silicide layers can degrade signal integrity. Therefore, in forming semiconductor devices having both digital and linear circuits on the same substrate, it is necessary to protect linear circuits from exposure to silicide-forming metals.
The conventional method for selectively applying silicides to surfaces of semiconductor devices utilizes an oxide mask. The oxide mask is deposited upon the entire surface of the device. Portions of the oxide mask are then selectively etched, exposing surfaces upon which silicide is to be formed. A silicide-forming metal is then sputtered upon the entire device, with silicide layers created only on those surfaces selectively etched.
One drawback to the conventional formation of silicided structures using oxide masking is that silicon oxide also forms several important and delicate components of semiconductor devices. For instance, in FIG. 1A, gate spacers 6 and field oxide structures 3 of the NMOS semiconductors 2 are composed of silicon oxide
Because of the extremely small size of the gate spacer and field oxide structures, imprecise etching of the mask oxide can easily damage or destroy them. For example, overetching of the gate spacer can cause shorting between the gate region and the source or drain component. Overetching of the field oxide can cause leakage of current to the surrounding silicon structures. Either of these effects can disable the semiconductor device.